RISC-V family

Families > RISC-V

RISC-V family summary Type: CPU Original designer: UC Berkeley Common manufacturer(s): GigaDevice,  SiFive,  Espressif Date: 2010 Bit-width: 32-bit, 64-bit, 128-bit Architecture: RISC-V Website: unknown website (wikipedia article)

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Pages

• Espressif - RISC-V family
• SiFive - Freedom U500 (layout)
• SiFive - RISC-V family
• WCH - CH32V003

See Also

• preDRAC (academic): https://upcommons.upc.edu/bitstream/handle/2117/334498/DCIS2020_PreDRAC_PostPrint.pdf
• Espressif ESP32-C2: https://www.eenewseurope.com/en/espressif-moves-exclusively-to-risc-v/
• EPAC1.0 (prototype): https://www.european-processor-initiative.eu/accelerator/
• Open-V: https://architecnologia.es/risc-v-introduccion-a-la-isa-parte-2
• Raven3 (academic): https://riscv.org/wp-content/uploads/2015/06/riscv-raven-workshop-june2015.pdf
• X-FAB PicoRV32 Raven: https://abopen.com/news/x-fab-efabless-announces-risc-v-based-raven-mixed-signal-soc/
• Manticore 4096-core RISC-V: https://www.anandtech.com/show/16007/hot-chips-2020-live-blog-manticore-4096core-riscv-330pm-pt
• RV16X-NANO (carbon nano-tube CPU) (academic)
  • https://dailytechinfo.org/nanotech/10634-rv16x-nano-pervyy-16-razryadnyy-programmiruemyy-processor-na-uglerodnyh-nanotrubkah.html
  • https://www.researchgate.net/figure/Microscopy-image-of-a-full-fabricated-RV16X-NANO-die-The-processor-core-is-in-the-middle_fig2_335457443
• Many RISC-V implimentations (academic): http://asic.ethz.ch/