Ingenic - JZ4740
From CPU Grave Yard
Ingenic - JZ4740
General Specifications:
Applications:
Architecture Specifications:
Arch / µarch:
? / ?
ISA:
Data-bus (ext):
8/16/32-bit
Address-bus:
?
Designer:
?
Integrated functions:
FPU:
NA
Memory Specifications:
RAM (max):
RAM type:
?
L1 cache:
16 KiB / 16 Ki bytes
L2 cache:
none
L3 cache:
none
Technology:
Transistors:
Die size:
Vsupply / Vcore:
1.8 V / 1.8 V
VI/O
3.3 V
Other:
Package:
Size:
13mm x 13 mm
Datasheet:
Categories:
- Ingenic - MIPS32 family
- MIPS32 family
- SoC
- Introduced in 2007
- 360 MHz
- 32-bit
- MIPS ISA
- MIPS32 core
- 1 cores
- Integrated I2C
- Integrated SPI
- Integrated USB
- Integrated SD/MCC/SDIO
- Integrated ADC
- Integrated LCD
- Integrated Camera
- Integrated Audio codex
- Integrated Timer
- Integrated WDT
- Integrated INTC
- Integrated DMA
- Integrated PWM
- Integrated CLK generator
- Integrated RTC
- Integrated GPIO
- CMOS technology
- 0.16 µm process
- BGA-193 package
- Chip pages
