Broadcom - BCM5352EKPBG
From CPU Grave Yard
Broadcom - BCM5352EKPBG
General Specifications:
Type:
Introduced:
?
Applications:
Architecture Specifications:
Data-bus (ext):
?
Address-bus:
16-bit
Designer:
?
Integrated functions:
FPU:
integrated
Features:
Memory Specifications:
RAM (max):
256 MiB
RAM type:
?
L1 cache:
16K/8K+256 bytes
L2 cache:
none
L3 cache:
none
Technology:
Technology:
Process size:
0.18µm
Transistors:
Die size:
Other:
Package:
Size:
Datasheet:
Categories:
- Broadcom - MIPS32 family
- MIPS32 family
- MCU
- 200 MHz
- 32-bit
- RISC architecture
- MIPS ISA
- MIPS32 core
- 1 cores
- Integrated SDRAM
- Integrated Flash controller
- Integrated Encore DSP
- Integrated PLL
- Integrated GPIO
- Integrated JTAG
- Integrated UART
- Integrated 5-port switch
- Integrated 802.11 controller
- CMOS technology
- 0.18µm process
- FBGA-336 package
- Chip pages